How best to reduce power on future ICs
http://www.eetimes.com/electronics-news/4236645/How-to-reduce-power-on-future-ICs
- Embrace co-design
- Lower the operating voltage
- Scale
performance
- Adopt 3-D/optical interconnect
- Try new materials
+
Smarter power management schemes
0 件のコメント:
コメントを投稿